Annals of Emerging Technologies in Computing (AETiC)

 
Paper #5                                                                             

FPGA Implementations of Algorithms for Preprocessing of High Frame Rate and High Resolution Image Streams in Real Time

Uroš Hudomalj, Christopher Mandla and Markus Plattner


Abstract: This paper presents FPGA implementations of image filtering and image averaging – two widely applied image preprocessing algorithms. The implementations are targeted for real time processing of high frame rate and high resolution image streams. The developed implementations are evaluated in terms of resource usage, power consumption, and achievable frame rates. For the evaluation, Microsemi’s Smartfusion2 Advanced Development Kit is used. It includes a SmartFusion2 M2S150 SoC FPGA. The performance of the developed implementation of image filtering algorithm is compared to a solution provided by MATLAB’s Vision HDL Toolbox, which is evaluated on the same platform. The performance of the developed implementations are also compared with FPGA implementations found in existing publications, although those are evaluated on different FPGA platforms. Difficulties with performance comparison between implementations on different platforms are addressed and limitations of processing image streams with FPGA platforms discussed.


Keywords: image processing; real time image processing; FPGA; Camera Link; resource usage; power consumption; frame rate; processing data rate.


 
Full Text

This work is licensed under a Creative Commons Attribution 4.0 International License. Creative Commons License


This browser does not support PDFs. Please download the PDF to view it: Download PDF.

 
 International Association for Educators and Researchers (IAER), registered in England and Wales - Reg #OC418009                         Copyright © IAER 2021